1 ? fn7504.1 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2004, 2005. all rights reserved. all other trademarks mentioned are the property of their respective owners. preliminary el8178 micropower single s upply rail-to-rail input-output precision op amp the el8178 is a micropower pr ecision operational amplifier optimized for single supply operation at 5v and can operate down to 2.4v. the el8178 draws minimal supply current while meeting excellent dc-accuracy noise and output drive specifications. competing devices seriously degrade these parameters to achieve micropower supply current. offset current, voltage and current noise, slew rate, and gain-bandwidth product are all two to ten times better than on previous micropower op amps. the el8178 can be operated from one lithium cell or two ni-cd batteries. the input range includes both positive and negative rail. the output swings to both rails. features ? 50a supply current ? 100v max offset voltage ? 1pa input bias current ? 400khz gain-bandwidth product ? 0.13v/s slew rate ? single supply operation down to 2.4v ? rail-to-rail input and output ? output sources and si nks 26ma load current applications ? battery- or solar-powered systems ? 4ma to 25ma current loops ? handheld consumer products ? medical devices ? thermocouple amplifiers ? photodiode pre amps ? ph probe amplifiers pinouts el8178 (6-pin sot-23) top view el8178 (8-pin so) top view ordering information part number package tape & reel pkg. dwg. # el8178aiw-t7 6-pin sot-23 7? (3k pcs) mdp0038 el8178aiw-t7a 6-pin sot-23 7? (250 pcs) mdp0038 el8178biw-t7 6-pin sot-23 7? (3k pcs) mdp0038 el8178biw-t7a 6-pin sot-23 7? (250 pcs) mdp0038 el8178is 8-pin so - mdp0027 EL8178IS-T7 8-pin so 7? mdp0027 el8178is-t13 8-pin so 13? mdp0027 1 2 3 6 4 5 +- out vs- in+ vs+ enable in- 1 2 3 4 8 7 6 5 - + nc in- in+ enable vs+ vout vs- nc data sheet may 5, 2005
2 fn7504.1 may 5, 2005 absolute maxi mum ratings (t a = 25c) supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5v current into i n +, i n -, or enable. . . . . . . . . . . . . . . . . . . . . . . . 5ma input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to v s + 0.5v output short-circuit duration . . . . . . . . . . . . . . . . . . . . . . .indefinite ambient operating temperature range . . . . . . . . . .-40c to +85c storage temperature range . . . . . . . . . . . . . . . . . .-65c to +150c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v s = 5v, 0v, v cm = 0.1v, v o = 1.4v, t a = 25c unless otherwise specified. parameter description conditions min typ max unit v os input offset voltage grade a 50 100 v grade b 110 400 v long term input offset voltage stability tbd v/mo input offset drift vs temperature 1.5 v/c i b input bias current 150pa e n input noise voltage density f o = 1khz 25 nv/ hz cmir input voltage range guaranteed by cmrr test 0 5 v cmrr input voltage range 0 5 v cmrr common-mode rejection ratio v cm = 0v to 5v 80 100 db psrr power supply rejection ratio v s = 3.3v to 5v 80 100 db a vol large signal voltage gain v o = 0.5v to 4.5v, r l = 100k ? 100 400 v/mv v o = 0.5v to 4.5v, r l = 1k ? 15 v/mv v out maximum output voltage swing output low, r l = 100k ? 36mv output low, r l = 1k ? 130 200 mv output high, r l = 100k ? 4.994 4.997 v output high, r l = 1k ? 4.8 4.88 v sr slew rate 0.09 0.13 0.17 v/s gbw gain bandwidth product f o = 100khz 400 khz i s,on supply current, enabled 40 50 75 a i s,off supply current, disabled 310a i o + short circuit output current r l = 10 ? 18 31 ma i o - short circuit output current r l = 10 ? 17 26 ma v s minimum supply voltage 2.2 2.4 v v inh enable pin high level 2v v inl enable pin low level 0.8 v i enh enable pin input current v en = 5v 0.25 0.7 2 a i enl enable pin input current v en = 0v -0.5 0 +0.5 a ? v os ? time ------------------ ? v os ? t --------------- - el8178
3 fn7504.1 may 5, 2005 typical performance curves figure 1. frequency response vs supply voltage f igure 2. frequency response vs supply voltage figure 3. supply current vs supply voltage figur e 4. input offset voltage vs output voltage figure 5. input offset voltage vs common-mode input voltage figure 6. input bias, offset current vs common- mode input voltage a v =1 r l =10k ? c l =2.7pf r f =100 ? r g =open 100 10k 100k 1m -5 frequency (hz) magnitude (db) 1k -4 -3 -2 1 2 -1 0 v s =1.0v v s =2.5v v s =1.25v a v =10 r l =10k ? c l =2.7pf r f =178 ? r g =19.6 ? 100 10k 100k 1m 0 frequency (hz) magnitude (db) 1k 3 6 9 18 21 12 15 v s =1.0v v s =2.5v v s =1.25v 234 5.5 0 supply voltage (v) supply current (a) 2.5 10 20 50 60 30 40 3.5 5 4.5 -0.5 5.5 -200 output voltage (v) input offset voltage (v) -100 0 200 100 0.5 1.5 2.5 3.5 4.5 a v =-1 v cm =v dd /2 -0.5 5.5 -250 common-mode input voltage (v) input offset voltage (v) -150 -50 250 150 0.5 1.5 2.5 3.5 4.5 50 -0.5 5.5 -20 common-mode input voltage (v) input bias, offset current (f a ) -10 0 20 0.5 1.5 2.5 3.5 4.5 10 i b + i b - i os el8178
4 fn7504.1 may 5, 2005 figure 7. a vol vs frequency @ 1k ? load figure 8. a vol vs frequency @ 100k ? load figure 9. package power dissipation vs ambient temperature figure 10. package power dissipation vs ambient temperature typical performance curves (continued) -20 gain (db) 0 20 80 100 40 60 10 10k 1m frequency (hz) 100 -150 phase () 200 150 100 50 0 -50 -100 100k 1k phase gain 11m -20 frequency (hz) gain (db) 20 60 120 10 100 1k 10k 100k 100 0 40 80 jedec jesd51-7 high effective thermal conductivity test board 0 power dissipation (w) 0.4 1 0.8 0.2 0.6 0 100 125 150 ambient temperature (c) 50 25 75 85 435mw 909mw j a = 2 3 0 c / w s o t 2 3 - 6 j a =1 1 0 c / w s o 8 jedec jesd51-3 low effective thermal conductivity test board 0 power dissipation (w) 0.2 0.7 0.6 0.1 0.4 0.5 0.3 0 100 125 150 ambient temperature (c) 50 25 75 85 391mw 625mw j a = 1 6 0 c / w s o 8 j a = 2 5 6 c / w s o t 2 3 - 6 el8178
5 fn7504.1 may 5, 2005 applications information introduction the el8178 is a rail-to-rail input and output micro-power precision single supply operational amplifier with an enable feature. the device achieves rail-to-rail input and output operation and eliminates the concerns introduced by a conventional rail-to-rail i/o operational amplifier. rail-to-rail input the pfet input stage of the el8178 has an input common- mode voltage range that goes from negative supply to positive supply without introduci ng offset errors or degrading performance associated with a c onventional rail-to-rail input operational amplifier. many rail-to-rail input stages use two differential input pairs, a long-tail pnp (or pfet) and an npn (or nfet). severe penalties have to be paid for this topology. as the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. the el8178 achieves input rail-to-rail performance without sacrificing important precision specifications and without degrading distortion performance. the el8178's input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. rail-to-rail output a pair of complementary mosfet devices achieves rail-to- rail output swing. the nmos sinks current to swing the output in the negative directio n. the pmos sources current to swing the output in the posit ive direction. the el8178 with a 100k ? load will swing to within 3mv of the supply rails. enable/disab le feature the el8178 offers an en pin. the active low enable pin disables the device when pulled up to at least 2.2v. upon disable the part consumes typi cally 3a, while the output is in a high impedance state. the en also has an internal pull down. if left open, the en pin will pull to negative rail and the device will be enabled by default. the high impedance at output during disable allows multiple el8178s to be connected together as a mux. th e outputs are tied together in parallel and a channel can be selected by the en pin. typical applications figure 11. ph probe amplifier a general-purpose combination ph probe has extremely high output impedance typically in the range of 10^12 ? . low loss and expensive teflon cables are often used to connect the ph probe to the meter electronics. the above circuit provides a low-cost alternative solution using the el8178 and a low-cost coax cable. the el8178 pmos high impedance input senses the ph probe output signal and buffers it to drive the coax cable. its rail-to-rail input nature also eliminates the need for a bias resistor network required by other amplifiers in the same application. figure 12. thermocouple amplifier thermocouples are the most popular temperature-sensing device because of their low cost, interchangeability, and ability to measure a wide range of temperatures. the el8178 is used to convert the differential thermocouple voltage into single-ended signal with 10x gain. the el8178's rail-to-rail input characteristic allows the thermocouple to be biased at ground and the converter to run from a single 5v supply. - + 3v + v+ v- el8178 coax general purpose combination ph probe - + 5v + v+ v- el8178 k type thermocouple 10k ? r 3 10k ? r 2 r 4 100k ? r 1 100k ? 410v/c el8178
6 fn7504.1 may 5, 2005 so package outline drawing el8178
7 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7504.1 may 5, 2005 sot-23 package outline drawing note: the package drawing shown here may not be the latest version. to check the latest revision, please refer to the intersil w ebsite at http://www.intersil.com/design/packages/index.asp el8178
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